vllm - ✅(Solved) Fix [Bug]: cudaErrorIllegalAddress during PIECEWISE CUDA graph replay with MoE LoRA: stale buffer addresses in `moe_lora_align_block_size` [1 pull requests, 1 comments, 1 participants]

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vllm-project/vllm#40038Fetched 2026-04-17 08:27:32
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Error Message

File "vllm/compilation/cuda_graph.py", line 355, in call entry.cudagraph.replay() File "torch/cuda/graphs.py", line 143, in replay super().replay() torch.AcceleratorError: CUDA error: an illegal memory access was encountered

Root Cause

Root Cause

Fix Action

Fix / Workaround

============================== CPU Info

Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Address sizes: 43 bits physical, 48 bits virtual Byte Order: Little Endian CPU(s): 256 On-line CPU(s) list: 0-255 Vendor ID: AuthenticAMD Model name: AMD EPYC 7742 64-Core Processor CPU family: 23 Model: 49 Thread(s) per core: 2 Core(s) per socket: 64 Socket(s): 2 Stepping: 0 Frequency boost: enabled CPU(s) scaling MHz: 45% CPU max MHz: 3416.0681 CPU min MHz: 1500.0000 BogoMIPS: 4491.54 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl xtopology nonstop_tsc cpuid extd_apicid aperfmperf rapl pni pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 x2apic movbe popcnt aes xsave avx f16c rdrand lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt tce topoext perfctr_core perfctr_nb bpext perfctr_llc mwaitx cpb cat_l3 cdp_l3 hw_pstate ssbd mba ibrs ibpb stibp vmmcall fsgsbase bmi1 avx2 smep bmi2 cqm rdt_a rdseed adx smap clflushopt clwb sha_ni xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local clzero irperf xsaveerptr rdpru wbnoinvd arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold avic v_vmsave_vmload vgif v_spec_ctrl umip rdpid overflow_recov succor smca sev sev_es Virtualization: AMD-V L1d cache: 4 MiB (128 instances) L1i cache: 4 MiB (128 instances) L2 cache: 64 MiB (128 instances) L3 cache: 512 MiB (32 instances) NUMA node(s): 8 NUMA node0 CPU(s): 0-15,128-143 NUMA node1 CPU(s): 16-31,144-159 NUMA node2 CPU(s): 32-47,160-175 NUMA node3 CPU(s): 48-63,176-191 NUMA node4 CPU(s): 64-79,192-207 NUMA node5 CPU(s): 80-95,208-223 NUMA node6 CPU(s): 96-111,224-239 NUMA node7 CPU(s): 112-127,240-255 Vulnerability Gather data sampling: Not affected Vulnerability Ghostwrite: Not affected Vulnerability Indirect target selection: Not affected Vulnerability Itlb multihit: Not affected Vulnerability L1tf: Not affected Vulnerability Mds: Not affected Vulnerability Meltdown: Not affected Vulnerability Mmio stale data: Not affected Vulnerability Old microcode: Not affected Vulnerability Reg file data sampling: Not affected Vulnerability Retbleed: Mitigation; untrained return thunk; SMT enabled with STIBP protection Vulnerability Spec rstack overflow: Mitigation; Safe RET Vulnerability Spec store bypass: Mitigation; Speculative Store Bypass disabled via prctl Vulnerability Spectre v1: Mitigation; usercopy/swapgs barriers and __user pointer sanitization Vulnerability Spectre v2: Mitigation; Retpolines; IBPB conditional; STIBP always-on; RSB filling; PBRSB-eIBRS Not affected; BHI Not affected Vulnerability Srbds: Not affected Vulnerability Tsa: Not affected Vulnerability Tsx async abort: Not affected Vulnerability Vmscape: Mitigation; IBPB before exit to userspace

PR fix notes

PR #40044: [Bugfix][LoRA][MoE] Reuse MoE align buffers for CUDA graph replay

Description (problem / solution / changelog)

Cache moe_lora_align_block_size output tensors by shape/device so PIECEWISE CUDA graph replay reuses stable buffer addresses. This prevents stale address dereferences when mixed base+LoRA batches change allocator state.

Made-with: Cursor

Purpose

Fix the issue [Bug]: cudaErrorIllegalAddress during PIECEWISE CUDA graph replay with MoE LoRA: stale buffer addresses in moe_lora_align_block_size #40038

Test Plan

python3 run_reproduce.py

Test Result

The script runs without crashing

~/workspace/vllm$ python3 run_reproduce.py 
Model:          nvidia/NVIDIA-Nemotron-3-Nano-30B-A3B-BF16
Adapter:        ace-nguyen/NVIDIA-Nemotron-3-Nano-30B-A3B-BF16-dummy-moe-lora
TP:             1
CUDAGraph mode: default
Pairs:          10

INFO 04-16 16:58:09 [utils.py:233] non-default args: {'trust_remote_code': True, 'disable_log_stats': True, 'enable_lora': True, 'model': 'nvidia/NVIDIA-Nemotron-3-Nano-30B-A3B-BF16'}
INFO 04-16 16:58:10 [model.py:554] Resolved architecture: NemotronHForCausalLM
INFO 04-16 16:58:10 [model.py:1685] Using max model len 262144
INFO 04-16 16:58:10 [scheduler.py:238] Chunked prefill is enabled with max_num_batched_tokens=8192.
INFO 04-16 16:58:10 [config.py:389] Updating mamba_ssm_cache_dtype to 'float32' for NemotronH model
INFO 04-16 16:58:10 [vllm.py:819] Asynchronous scheduling is enabled.
INFO 04-16 16:58:10 [kernel.py:199] Final IR op priority after setting platform defaults: IrOpPriorityConfig(rms_norm=['native'])
(EngineCore pid=238161) INFO 04-16 16:58:12 [core.py:107] Initializing a V1 LLM engine (v0.19.1rc1.dev269+gf7e62e3d6) with config: model='nvidia/NVIDIA-Nemotron-3-Nano-30B-A3B-BF16', speculative_config=None, tokenizer='nvidia/NVIDIA-Nemotron-3-Nano-30B-A3B-BF16', skip_tokenizer_init=False, tokenizer_mode=auto, revision=None, tokenizer_revision=None, trust_remote_code=True, dtype=torch.bfloat16, max_seq_len=262144, download_dir=None, load_format=auto, tensor_parallel_size=1, pipeline_parallel_size=1, data_parallel_size=1, decode_context_parallel_size=1, dcp_comm_backend=ag_rs, disable_custom_all_reduce=False, quantization=None, quantization_config=None, enforce_eager=False, enable_return_routed_experts=False, kv_cache_dtype=auto, device_config=cuda, structured_outputs_config=StructuredOutputsConfig(backend='auto', disable_any_whitespace=False, disable_additional_properties=False, reasoning_parser='', reasoning_parser_plugin='', enable_in_reasoning=False), observability_config=ObservabilityConfig(show_hidden_metrics_for_version=None, otlp_traces_endpoint=None, collect_detailed_traces=None, kv_cache_metrics=False, kv_cache_metrics_sample=0.01, cudagraph_metrics=False, enable_layerwise_nvtx_tracing=False, enable_mfu_metrics=False, enable_mm_processor_stats=False, enable_logging_iteration_details=False), seed=0, served_model_name=nvidia/NVIDIA-Nemotron-3-Nano-30B-A3B-BF16, enable_prefix_caching=False, enable_chunked_prefill=True, pooler_config=None, compilation_config={'mode': <CompilationMode.VLLM_COMPILE: 3>, 'debug_dump_path': None, 'cache_dir': '', 'compile_cache_save_format': 'binary', 'backend': 'inductor', 'custom_ops': ['none'], 'ir_enable_torch_wrap': True, 'splitting_ops': ['vllm::unified_attention_with_output', 'vllm::unified_mla_attention_with_output', 'vllm::mamba_mixer2', 'vllm::mamba_mixer', 'vllm::short_conv', 'vllm::linear_attention', 'vllm::plamo2_mamba_mixer', 'vllm::gdn_attention_core', 'vllm::olmo_hybrid_gdn_full_forward', 'vllm::kda_attention', 'vllm::sparse_attn_indexer', 'vllm::rocm_aiter_sparse_attn_indexer', 'vllm::unified_kv_cache_update', 'vllm::unified_mla_kv_cache_update'], 'compile_mm_encoder': False, 'cudagraph_mm_encoder': False, 'encoder_cudagraph_token_budgets': [], 'encoder_cudagraph_max_vision_items_per_batch': 0, 'encoder_cudagraph_max_frames_per_batch': 0, 'compile_sizes': [], 'compile_ranges_endpoints': [8192], 'inductor_compile_config': {'enable_auto_functionalized_v2': False, 'size_asserts': False, 'alignment_asserts': False, 'scalar_asserts': False, 'combo_kernels': True, 'benchmark_combo_kernel': True}, 'inductor_passes': {}, 'cudagraph_mode': <CUDAGraphMode.FULL_AND_PIECEWISE: (2, 1)>, 'cudagraph_num_of_warmups': 1, 'cudagraph_capture_sizes': [1, 2, 4, 8, 16, 24, 32, 40, 48, 56, 64, 72, 80, 88, 96, 104, 112, 120, 128, 136, 144, 152, 160, 168, 176, 184, 192, 200, 208, 216, 224, 232, 240, 248, 256, 272, 288, 304, 320, 336, 352, 368, 384, 400, 416, 432, 448, 464, 480, 496, 512], 'cudagraph_copy_inputs': False, 'cudagraph_specialize_lora': True, 'use_inductor_graph_partition': False, 'pass_config': {'fuse_norm_quant': False, 'fuse_act_quant': False, 'fuse_attn_quant': False, 'enable_sp': False, 'fuse_gemm_comms': False, 'fuse_allreduce_rms': False}, 'max_cudagraph_capture_size': 512, 'dynamic_shapes_config': {'type': <DynamicShapesType.BACKED: 'backed'>, 'evaluate_guards': False, 'assume_32_bit_indexing': False}, 'local_cache_dir': None, 'fast_moe_cold_start': False, 'static_all_moe_layers': []}, kernel_config=KernelConfig(ir_op_priority=IrOpPriorityConfig(rms_norm=['native']), enable_flashinfer_autotune=True, moe_backend='auto')
(EngineCore pid=238161) INFO 04-16 16:58:15 [parallel_state.py:1400] world_size=1 rank=0 local_rank=0 distributed_init_method=tcp://10.78.13.179:48849 backend=nccl
(EngineCore pid=238161) INFO 04-16 16:58:15 [parallel_state.py:1713] rank 0 in world size 1 is assigned as DP rank 0, PP rank 0, PCP rank 0, TP rank 0, EP rank 0, EPLB rank N/A
(EngineCore pid=238161) INFO 04-16 16:58:16 [gpu_model_runner.py:4750] Starting to load model nvidia/NVIDIA-Nemotron-3-Nano-30B-A3B-BF16...
(EngineCore pid=238161) INFO 04-16 16:58:16 [unquantized.py:283] Using TRITON Unquantized MoE backend out of potential backends: ['FlashInfer TRTLLM', 'FlashInfer CUTLASS', 'TRITON', 'BATCHED_TRITON'].
(EngineCore pid=238161) INFO 04-16 16:58:16 [cuda.py:366] Using FLASH_ATTN attention backend out of potential backends: ['FLASH_ATTN', 'FLASHINFER', 'TRITON_ATTN', 'FLEX_ATTENTION'].
(EngineCore pid=238161) INFO 04-16 16:58:16 [flash_attn.py:637] Using FlashAttention version 2
(EngineCore pid=238161) INFO 04-16 16:58:17 [weight_utils.py:904] Filesystem type for checkpoints: EXT4. Checkpoint size: 58.82 GiB. Available RAM: 1978.71 GiB.
(EngineCore pid=238161) INFO 04-16 16:58:17 [weight_utils.py:927] Auto-prefetch is disabled because the filesystem (EXT4) is not a recognized network FS (NFS/Lustre). If you want to force prefetching, start vLLM with --safetensors-load-strategy=prefetch.
Loading safetensors checkpoint shards:   0% Completed | 0/13 [00:00<?, ?it/s]
Loading safetensors checkpoint shards:   8% Completed | 1/13 [00:00<00:06,  1.90it/s]
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(EngineCore pid=238161) 
(EngineCore pid=238161) INFO 04-16 16:58:24 [default_loader.py:384] Loading weights took 6.76 seconds
(EngineCore pid=238161) INFO 04-16 16:58:24 [unquantized.py:340] Using MoEPrepareAndFinalizeNoDPEPModular
(EngineCore pid=238161) INFO 04-16 16:58:24 [utils.py:99] MoE model detected. Using fused MoE LoRA implementation.
(EngineCore pid=238161) INFO 04-16 16:58:24 [punica_selector.py:20] Using PunicaWrapperGPU.
(EngineCore pid=238161) INFO 04-16 16:58:25 [gpu_model_runner.py:4835] Model loading took 59.75 GiB memory and 8.029267 seconds
(EngineCore pid=238161) INFO 04-16 16:58:25 [interface.py:606] Setting attention block size to 2096 tokens to ensure that attention page size is >= mamba page size.
(EngineCore pid=238161) INFO 04-16 16:58:25 [interface.py:630] Padding mamba page size by 0.58% to ensure that mamba page size and attention page size are exactly equal.
(EngineCore pid=238161) INFO 04-16 16:58:32 [backends.py:1070] Using cache directory: /.cache/vllm/torch_compile_cache/7c6e310cd7/rank_0_0/backbone for vLLM's torch.compile
(EngineCore pid=238161) INFO 04-16 16:58:32 [backends.py:1130] Dynamo bytecode transform time: 5.90 s
(EngineCore pid=238161) INFO 04-16 16:58:33 [backends.py:373] Cache the graph of compile range (1, 8192) for later use
(EngineCore pid=238161) INFO 04-16 16:58:35 [backends.py:391] Compiling a graph for compile range (1, 8192) takes 2.04 s
(EngineCore pid=238161) INFO 04-16 16:58:38 [decorators.py:655] saved AOT compiled function to /.cache/vllm/torch_compile_cache/torch_aot_compile/15d5c38cfcc9d7e8cf53b4c683dbe039afae71779b87ba6d4469bba641380e5f/rank_0_0/model
(EngineCore pid=238161) INFO 04-16 16:58:38 [monitor.py:48] torch.compile took 12.28 s in total
(EngineCore pid=238161) WARNING 04-16 16:58:40 [fused_moe.py:1090] Using default MoE config. Performance might be sub-optimal! Config file not found at /workspace/vllm/vllm/model_executor/layers/fused_moe/configs/E=128,N=1856,device_name=NVIDIA_A100-SXM4-80GB.json
(EngineCore pid=238161) INFO 04-16 16:58:41 [monitor.py:76] Initial profiling/warmup run took 2.33 s
(EngineCore pid=238161) WARNING 04-16 16:58:41 [kv_cache_utils.py:1059] Add 1 padding layers, may waste at most 4.35% KV cache memory
(EngineCore pid=238161) INFO 04-16 16:58:41 [kv_cache_utils.py:829] Overriding num_gpu_blocks=0 with num_gpu_blocks_override=512
(EngineCore pid=238161) INFO 04-16 16:58:41 [gpu_model_runner.py:5914] Profiling CUDA graph memory: PIECEWISE=102 (largest=512), FULL=70 (largest=256)
(EngineCore pid=238161) WARNING 04-16 16:58:42 [utils.py:267] Using default LoRA kernel configs
(EngineCore pid=238161) INFO 04-16 16:58:44 [gpu_model_runner.py:5993] Estimated CUDA graph memory: 0.67 GiB total
(EngineCore pid=238161) INFO 04-16 16:58:44 [gpu_worker.py:436] Available KV cache memory: 9.45 GiB
(EngineCore pid=238161) INFO 04-16 16:58:44 [gpu_worker.py:470] In v0.19, CUDA graph memory profiling will be enabled by default (VLLM_MEMORY_PROFILER_ESTIMATE_CUDAGRAPHS=1), which more accurately accounts for CUDA graph memory during KV cache allocation. To try it now, set VLLM_MEMORY_PROFILER_ESTIMATE_CUDAGRAPHS=1 and increase --gpu-memory-utilization from 0.9000 to 0.9085 to maintain the same effective KV cache size.
(EngineCore pid=238161) WARNING 04-16 16:58:44 [kv_cache_utils.py:1059] Add 1 padding layers, may waste at most 4.35% KV cache memory
(EngineCore pid=238161) INFO 04-16 16:58:44 [kv_cache_utils.py:1319] GPU KV cache size: 329,072 tokens
(EngineCore pid=238161) INFO 04-16 16:58:44 [kv_cache_utils.py:1324] Maximum concurrency for 262,144 tokens per request: 6.05x
Capturing CUDA graphs (mixed prefill-decode, PIECEWISE): 100%|██████████████████████████████████████████████████████████████████████| 102/102 [00:21<00:00,  4.77it/s]
Capturing CUDA graphs (decode, FULL): 100%|███████████████████████████████████████████████████████████████████████████████████████████| 70/70 [00:17<00:00,  4.10it/s]
(EngineCore pid=238161) INFO 04-16 16:59:23 [gpu_model_runner.py:6084] Graph capturing finished in 39 secs, took 1.68 GiB
(EngineCore pid=238161) INFO 04-16 16:59:23 [gpu_worker.py:597] CUDA graph pool memory: 1.68 GiB (actual), 0.67 GiB (estimated), difference: 1.01 GiB (60.0%).
(EngineCore pid=238161) INFO 04-16 16:59:24 [core.py:285] init engine (profile, create kv cache, warmup model) took 59.52 seconds
(EngineCore pid=238161) INFO 04-16 16:59:24 [kernel.py:199] Final IR op priority after setting platform defaults: IrOpPriorityConfig(rms_norm=['native'])
Generating 20 requests (interleaved base+LoRA)...
Rendering prompts:   0%|                                                                                                                       | 0/20 [00:00<?, ?it/s]WARNING 04-16 16:59:25 [input_processor.py:149] vLLM has deprecated support for supporting different tokenizers for different LoRAs. By default, vLLM uses base model's tokenizer. If you are using a LoRA with its own tokenizer, consider specifying `--tokenizer [lora_path]` to use the LoRA tokenizer.
Rendering prompts: 100%|█████████████████████████████████████████████████████████████████████████████████████████████████████████████| 20/20 [00:00<00:00, 223.19it/s]
Processed prompts:   0%|                                                                   | 0/20 [00:00<?, ?it/s, est. speed input: 0.00 toks/s, output: 0.00 toks/s]Fetching 4 files: 100%|██████████████████████████████████████████████████████████████████████████████████████████████████████████████| 4/4 [00:00<00:00, 44384.17it/s]
Processed prompts: 100%|███████████████████████████████████████████████████████| 20/20 [00:04<00:00,  4.26it/s, est. speed input: 61.79 toks/s, output: 136.35 toks/s]

Completed 20 requests successfully.
  [BASE]  binary representation**  ``` binary 0 = 0 binary 1 = 1 binary 2 = 10 binary 3 =...
  [LORA]  o:1 c:0 l:4 r:0 a:4 L:0 R:0 o:2 (note case-insensitive). Output counts...
  [BASE]  _COUNT__BASE function. Action: _COUNT__BASE function with request 1.  Next requ...
  [LORA]  1 2 3 4 5 6 7 8 9 10 11 12 13 1...

PASSED
(EngineCore pid=238161) INFO 04-16 16:59:29 [core.py:1212] Shutdown initiated (timeout=0)
(EngineCore pid=238161) INFO 04-16 16:59:29 [core.py:1235] Shutdown complete

<details> <summary> Essential Elements of an Effective PR Description Checklist </summary>
  • The purpose of the PR, such as "Fix some issue (link existing issues this PR will resolve)".
  • The test plan, such as providing test command.
  • The test results, such as pasting the results comparison before and after, or e2e results
  • (Optional) The necessary documentation update, such as updating supported_models.md and examples for a new model.
</details>

Changed files

  • vllm/lora/punica_wrapper/punica_gpu.py (modified, +73/-14)

Code Example

Collecting environment information...
==============================
        System Info
==============================
OS                           : Ubuntu 24.04.4 LTS (x86_64)
GCC version                  : (Ubuntu 13.3.0-6ubuntu2~24.04.1) 13.3.0
Clang version                : Could not collect
CMake version                : Could not collect
Libc version                 : glibc-2.39

==============================
       PyTorch Info
==============================
PyTorch version              : 2.11.0+cu130
Is debug build               : False
CUDA used to build PyTorch   : 13.0
ROCM used to build PyTorch   : N/A
XPU used to build PyTorch    : N/A

==============================
      Python Environment
==============================
Python version               : 3.12.13 (main, Apr 14 2026, 14:29:00) [Clang 22.1.3 ] (64-bit runtime)
Python platform              : Linux-6.17.0-19-generic-x86_64-with-glibc2.39
    
==============================
       CUDA / GPU Info
==============================
Is CUDA available            : True
CUDA runtime version         : Could not collect
CUDA_MODULE_LOADING set to   : 
GPU models and configuration : 
GPU 0: NVIDIA A100-SXM4-80GB
GPU 1: NVIDIA A100-SXM4-80GB
GPU 2: NVIDIA A100-SXM4-80GB
GPU 3: NVIDIA A100-SXM4-80GB
GPU 4: NVIDIA A100-SXM4-80GB
GPU 5: NVIDIA A100-SXM4-80GB
GPU 6: NVIDIA A100-SXM4-80GB
GPU 7: NVIDIA A100-SXM4-80GB

Nvidia driver version        : 595.58.03
cuDNN version                : Could not collect
HIP runtime version          : N/A
MIOpen runtime version       : N/A
Is XNNPACK available         : True

==============================
          CPU Info
==============================
Architecture:                            x86_64
CPU op-mode(s):                          32-bit, 64-bit
Address sizes:                           43 bits physical, 48 bits virtual
Byte Order:                              Little Endian
CPU(s):                                  256
On-line CPU(s) list:                     0-255
Vendor ID:                               AuthenticAMD
Model name:                              AMD EPYC 7742 64-Core Processor
CPU family:                              23
Model:                                   49
Thread(s) per core:                      2
Core(s) per socket:                      64
Socket(s):                               2
Stepping:                                0
Frequency boost:                         enabled
CPU(s) scaling MHz:                      45%
CPU max MHz:                             3416.0681
CPU min MHz:                             1500.0000
BogoMIPS:                                4491.54
Flags:                                   fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl xtopology nonstop_tsc cpuid extd_apicid aperfmperf rapl pni pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 x2apic movbe popcnt aes xsave avx f16c rdrand lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt tce topoext perfctr_core perfctr_nb bpext perfctr_llc mwaitx cpb cat_l3 cdp_l3 hw_pstate ssbd mba ibrs ibpb stibp vmmcall fsgsbase bmi1 avx2 smep bmi2 cqm rdt_a rdseed adx smap clflushopt clwb sha_ni xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local clzero irperf xsaveerptr rdpru wbnoinvd arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold avic v_vmsave_vmload vgif v_spec_ctrl umip rdpid overflow_recov succor smca sev sev_es
Virtualization:                          AMD-V
L1d cache:                               4 MiB (128 instances)
L1i cache:                               4 MiB (128 instances)
L2 cache:                                64 MiB (128 instances)
L3 cache:                                512 MiB (32 instances)
NUMA node(s):                            8
NUMA node0 CPU(s):                       0-15,128-143
NUMA node1 CPU(s):                       16-31,144-159
NUMA node2 CPU(s):                       32-47,160-175
NUMA node3 CPU(s):                       48-63,176-191
NUMA node4 CPU(s):                       64-79,192-207
NUMA node5 CPU(s):                       80-95,208-223
NUMA node6 CPU(s):                       96-111,224-239
NUMA node7 CPU(s):                       112-127,240-255
Vulnerability Gather data sampling:      Not affected
Vulnerability Ghostwrite:                Not affected
Vulnerability Indirect target selection: Not affected
Vulnerability Itlb multihit:             Not affected
Vulnerability L1tf:                      Not affected
Vulnerability Mds:                       Not affected
Vulnerability Meltdown:                  Not affected
Vulnerability Mmio stale data:           Not affected
Vulnerability Old microcode:             Not affected
Vulnerability Reg file data sampling:    Not affected
Vulnerability Retbleed:                  Mitigation; untrained return thunk; SMT enabled with STIBP protection
Vulnerability Spec rstack overflow:      Mitigation; Safe RET
Vulnerability Spec store bypass:         Mitigation; Speculative Store Bypass disabled via prctl
Vulnerability Spectre v1:                Mitigation; usercopy/swapgs barriers and __user pointer sanitization
Vulnerability Spectre v2:                Mitigation; Retpolines; IBPB conditional; STIBP always-on; RSB filling; PBRSB-eIBRS Not affected; BHI Not affected
Vulnerability Srbds:                     Not affected
Vulnerability Tsa:                       Not affected
Vulnerability Tsx async abort:           Not affected
Vulnerability Vmscape:                   Mitigation; IBPB before exit to userspace

==============================
Versions of relevant libraries
==============================
[pip3] flashinfer-python==0.6.7
[pip3] numpy==2.2.6
[pip3] nvidia-cublas==13.1.0.3
[pip3] nvidia-cublas-cu12==12.8.4.1
[pip3] nvidia-cuda-cupti==13.0.85
[pip3] nvidia-cuda-cupti-cu12==12.8.90
[pip3] nvidia-cuda-nvrtc==13.0.88
[pip3] nvidia-cuda-nvrtc-cu12==12.8.93
[pip3] nvidia-cuda-runtime==13.0.96
[pip3] nvidia-cuda-runtime-cu12==12.8.90
[pip3] nvidia-cudnn-cu12==9.10.2.21
[pip3] nvidia-cudnn-cu13==9.19.0.56
[pip3] nvidia-cudnn-frontend==1.18.0
[pip3] nvidia-cufft==12.0.0.61
[pip3] nvidia-cufft-cu12==11.3.3.83
[pip3] nvidia-cufile==1.15.1.6
[pip3] nvidia-cufile-cu12==1.13.1.3
[pip3] nvidia-curand==10.4.0.35
[pip3] nvidia-curand-cu12==10.3.9.90
[pip3] nvidia-cusolver==12.0.4.66
[pip3] nvidia-cusolver-cu12==11.7.3.90
[pip3] nvidia-cusparse==12.6.3.3
[pip3] nvidia-cusparse-cu12==12.5.8.93
[pip3] nvidia-cusparselt-cu12==0.7.1
[pip3] nvidia-cusparselt-cu13==0.8.0
[pip3] nvidia-cutlass-dsl==4.4.2
[pip3] nvidia-cutlass-dsl-libs-base==4.4.2
[pip3] nvidia-ml-py==13.595.45
[pip3] nvidia-nccl-cu12==2.27.5
[pip3] nvidia-nccl-cu13==2.28.9
[pip3] nvidia-nvjitlink==13.0.88
[pip3] nvidia-nvjitlink-cu12==12.8.93
[pip3] nvidia-nvshmem-cu12==3.4.5
[pip3] nvidia-nvshmem-cu13==3.4.5
[pip3] nvidia-nvtx==13.0.85
[pip3] nvidia-nvtx-cu12==12.8.90
[pip3] pyzmq==27.1.0
[pip3] torch==2.11.0
[pip3] torch_c_dlpack_ext==0.1.5
[pip3] torchaudio==2.11.0
[pip3] torchvision==0.26.0
[pip3] transformers==4.57.6
[pip3] triton==3.6.0
[conda] Could not collect

==============================
         vLLM Info
==============================
ROCM Version                 : Could not collect
vLLM Version                 : 0.19.1rc1.dev269+gf7e62e3d6 (git sha: f7e62e3d6)
vLLM Build Flags:
  CUDA Archs: Not Set; ROCm: Disabled; XPU: Disabled
GPU Topology:
        GPU0    GPU1    GPU2    GPU3    GPU4    GPU5    GPU6    GPU7    NIC0    NIC1    NIC2    NIC3    CPU Affinity    NUMA Affinity   GPU NUMA ID
GPU0     X      NV12    NV12    NV12    NV12    NV12    NV12    NV12    SYS     SYS     SYS     SYS     48-63,176-191   3               N/A
GPU1    NV12     X      NV12    NV12    NV12    NV12    NV12    NV12    SYS     SYS     SYS     SYS     48-63,176-191   3               N/A
GPU2    NV12    NV12     X      NV12    NV12    NV12    NV12    NV12    SYS     SYS     SYS     SYS     16-31,144-159   1               N/A
GPU3    NV12    NV12    NV12     X      NV12    NV12    NV12    NV12    SYS     SYS     SYS     SYS     16-31,144-159   1               N/A
GPU4    NV12    NV12    NV12    NV12     X      NV12    NV12    NV12    SYS     SYS     SYS     SYS     112-127,240-255 7               N/A
GPU5    NV12    NV12    NV12    NV12    NV12     X      NV12    NV12    SYS     SYS     SYS     SYS     112-127,240-255 7               N/A
GPU6    NV12    NV12    NV12    NV12    NV12    NV12     X      NV12    SYS     SYS     SYS     SYS     80-95,208-223   5               N/A
GPU7    NV12    NV12    NV12    NV12    NV12    NV12    NV12     X      SYS     SYS     SYS     SYS     80-95,208-223   5               N/A
NIC0    SYS     SYS     SYS     SYS     SYS     SYS     SYS     SYS      X      PIX     SYS     SYS
NIC1    SYS     SYS     SYS     SYS     SYS     SYS     SYS     SYS     PIX      X      SYS     SYS
NIC2    SYS     SYS     SYS     SYS     SYS     SYS     SYS     SYS     SYS     SYS      X      PIX
NIC3    SYS     SYS     SYS     SYS     SYS     SYS     SYS     SYS     SYS     SYS     PIX      X 

Legend:

  X    = Self
  SYS  = Connection traversing PCIe as well as the SMP interconnect between NUMA nodes (e.g., QPI/UPI)
  NODE = Connection traversing PCIe as well as the interconnect between PCIe Host Bridges within a NUMA node
  PHB  = Connection traversing PCIe as well as a PCIe Host Bridge (typically the CPU)
  PXB  = Connection traversing multiple PCIe bridges (without traversing the PCIe Host Bridge)
  PIX  = Connection traversing at most a single PCIe bridge
  NV#  = Connection traversing a bonded set of # NVLinks

NIC Legend:

  NIC0: mlx5_4
  NIC1: mlx5_5
  NIC2: mlx5_10
  NIC3: mlx5_11

==============================
     Environment Variables
==============================
PYTORCH_NVML_BASED_CUDA_CHECK=1
TORCHINDUCTOR_COMPILE_THREADS=1
TORCHINDUCTOR_CACHE_DIR=/tmp/torchinductor_local

---

sorted_ids = torch.empty((max_loras * max_num_tokens_padded,), dtype=torch.int32, device=topk_ids.device)
expert_ids = torch.empty((max_loras * max_num_m_blocks,), dtype=torch.int32, device=topk_ids.device)
num_tokens_post_pad = torch.empty((max_loras,), dtype=torch.int32, device=topk_ids.device)

---

File "vllm/compilation/cuda_graph.py", line 355, in __call__
    entry.cudagraph.replay()
File "torch/cuda/graphs.py", line 143, in replay
    super().replay()
torch.AcceleratorError: CUDA error: an illegal memory access was encountered

---

#!/usr/bin/env python3
"""
Offline reproducer for the concurrent base + LoRA MoE segfault.

Uses vLLM's LLM API directly — no server needed. Sends interleaved
base + LoRA requests in a single batch to trigger the
moe_lora_align_block_size stale-buffer crash during CUDA graph replay.

Usage:
    python repro_offline.py
    python repro_offline.py --model nvidia/NVIDIA-Nemotron-3-Nano-30B-A3B-BF16
    python repro_offline.py --model nvidia/NVIDIA-Nemotron-3-Nano-30B-A3B-BF16 --adapter ace-nguyen/NVIDIA-Nemotron-3-Nano-30B-A3B-BF16-dummy-moe-lora --tp 2
    python repro_offline.py --cudagraph-mode full
    python repro_offline.py --cudagraph-mode none   # eager mode, no graphs
"""

import argparse

from vllm import LLM, SamplingParams
from vllm.lora.request import LoRARequest

# Valid CUDAGraphMode values (from pydantic validation):
#   0 = NONE, 1 = PIECEWISE, 2 = FULL, (2,0) = FULL, (2,1) = FULL+PIECEWISE
CUDAGRAPH_MODES = {
    "full": 2,                # full only, no piecewise
    "piecewise": 1,           # piecewise only, no full
    "both": (2, 1),           # full + piecewise (vLLM default)
    "none": None,             # eager mode, no graphs at all
}


def main():
    p = argparse.ArgumentParser(description="Offline base+LoRA crash reproducer")
    p.add_argument(
        "--model",
        default="nvidia/NVIDIA-Nemotron-3-Nano-30B-A3B-BF16",
        help="Base model path",
    )
    p.add_argument(
        "--adapter",
        default="ace-nguyen/NVIDIA-Nemotron-3-Nano-30B-A3B-BF16-dummy-moe-lora",
        help="LoRA adapter path",
    )
    p.add_argument("--adapter-name", default="test-lora", help="LoRA adapter name")
    p.add_argument("--tp", type=int, default=1, help="Tensor parallel size")
    p.add_argument(
        "--cudagraph-mode",
        choices=list(CUDAGRAPH_MODES.keys()),
        default=None,
        help="CUDA graph mode: full, piecewise, full_and_piecewise, none (default: vLLM default)",
    )
    p.add_argument("-n", type=int, default=10, help="Number of request pairs (base+lora)")
    args = p.parse_args()

    print(f"Model:          {args.model}")
    print(f"Adapter:        {args.adapter}")
    print(f"TP:             {args.tp}")
    print(f"CUDAGraph mode: {args.cudagraph_mode or 'default'}")
    print(f"Pairs:          {args.n}")
    print()

    llm_kwargs = dict(
        model=args.model,
        tensor_parallel_size=args.tp,
        enable_lora=True,
        trust_remote_code=True,
    )

    if args.cudagraph_mode is not None:
        mode = CUDAGRAPH_MODES[args.cudagraph_mode]
        if mode is None:
            llm_kwargs["enforce_eager"] = True
        else:
            llm_kwargs["compilation_config"] = {"cudagraph_mode": mode}

    llm = LLM(**llm_kwargs)

    sampling = SamplingParams(
        max_tokens=32,
        min_tokens=32,
        ignore_eos=True,
    )

    lora_req = LoRARequest(args.adapter_name, 1, args.adapter)

    # Build interleaved batch: base, lora, base, lora, ...
    prompts = []
    lora_requests = []
    for i in range(args.n):
        # Base model request
        prompts.append(f"Base request {i}: Count from 1 to 50:")
        lora_requests.append(None)
        # LoRA request
        prompts.append(f"LoRA request {i}: Count from 1 to 50:")
        lora_requests.append(lora_req)

    print(f"Generating {len(prompts)} requests (interleaved base+LoRA)...")

    # This triggers the crash if the bug is present — the first generate()
    # replays CUDA graphs captured during warmup, and stale buffer addresses
    # in moe_lora_align_block_size cause a segfault.
    outputs = llm.generate(
        prompts,
        sampling_params=sampling,
        lora_request=lora_requests,
    )

    print(f"\nCompleted {len(outputs)} requests successfully.")
    for i, out in enumerate(outputs[:4]):
        tag = "BASE" if lora_requests[i] is None else "LORA"
        text = out.outputs[0].text[:80].replace("\n", " ")
        print(f"  [{tag}] {text}...")

    print("\nPASSED")

if __name__ == "__main__":
    main()
RAW_BUFFERClick to expand / collapse

Your current environment

<details> <summary>The output of <code>python collect_env.py</code></summary>
Collecting environment information...
==============================
        System Info
==============================
OS                           : Ubuntu 24.04.4 LTS (x86_64)
GCC version                  : (Ubuntu 13.3.0-6ubuntu2~24.04.1) 13.3.0
Clang version                : Could not collect
CMake version                : Could not collect
Libc version                 : glibc-2.39

==============================
       PyTorch Info
==============================
PyTorch version              : 2.11.0+cu130
Is debug build               : False
CUDA used to build PyTorch   : 13.0
ROCM used to build PyTorch   : N/A
XPU used to build PyTorch    : N/A

==============================
      Python Environment
==============================
Python version               : 3.12.13 (main, Apr 14 2026, 14:29:00) [Clang 22.1.3 ] (64-bit runtime)
Python platform              : Linux-6.17.0-19-generic-x86_64-with-glibc2.39
    
==============================
       CUDA / GPU Info
==============================
Is CUDA available            : True
CUDA runtime version         : Could not collect
CUDA_MODULE_LOADING set to   : 
GPU models and configuration : 
GPU 0: NVIDIA A100-SXM4-80GB
GPU 1: NVIDIA A100-SXM4-80GB
GPU 2: NVIDIA A100-SXM4-80GB
GPU 3: NVIDIA A100-SXM4-80GB
GPU 4: NVIDIA A100-SXM4-80GB
GPU 5: NVIDIA A100-SXM4-80GB
GPU 6: NVIDIA A100-SXM4-80GB
GPU 7: NVIDIA A100-SXM4-80GB

Nvidia driver version        : 595.58.03
cuDNN version                : Could not collect
HIP runtime version          : N/A
MIOpen runtime version       : N/A
Is XNNPACK available         : True

==============================
          CPU Info
==============================
Architecture:                            x86_64
CPU op-mode(s):                          32-bit, 64-bit
Address sizes:                           43 bits physical, 48 bits virtual
Byte Order:                              Little Endian
CPU(s):                                  256
On-line CPU(s) list:                     0-255
Vendor ID:                               AuthenticAMD
Model name:                              AMD EPYC 7742 64-Core Processor
CPU family:                              23
Model:                                   49
Thread(s) per core:                      2
Core(s) per socket:                      64
Socket(s):                               2
Stepping:                                0
Frequency boost:                         enabled
CPU(s) scaling MHz:                      45%
CPU max MHz:                             3416.0681
CPU min MHz:                             1500.0000
BogoMIPS:                                4491.54
Flags:                                   fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl xtopology nonstop_tsc cpuid extd_apicid aperfmperf rapl pni pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 x2apic movbe popcnt aes xsave avx f16c rdrand lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt tce topoext perfctr_core perfctr_nb bpext perfctr_llc mwaitx cpb cat_l3 cdp_l3 hw_pstate ssbd mba ibrs ibpb stibp vmmcall fsgsbase bmi1 avx2 smep bmi2 cqm rdt_a rdseed adx smap clflushopt clwb sha_ni xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local clzero irperf xsaveerptr rdpru wbnoinvd arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold avic v_vmsave_vmload vgif v_spec_ctrl umip rdpid overflow_recov succor smca sev sev_es
Virtualization:                          AMD-V
L1d cache:                               4 MiB (128 instances)
L1i cache:                               4 MiB (128 instances)
L2 cache:                                64 MiB (128 instances)
L3 cache:                                512 MiB (32 instances)
NUMA node(s):                            8
NUMA node0 CPU(s):                       0-15,128-143
NUMA node1 CPU(s):                       16-31,144-159
NUMA node2 CPU(s):                       32-47,160-175
NUMA node3 CPU(s):                       48-63,176-191
NUMA node4 CPU(s):                       64-79,192-207
NUMA node5 CPU(s):                       80-95,208-223
NUMA node6 CPU(s):                       96-111,224-239
NUMA node7 CPU(s):                       112-127,240-255
Vulnerability Gather data sampling:      Not affected
Vulnerability Ghostwrite:                Not affected
Vulnerability Indirect target selection: Not affected
Vulnerability Itlb multihit:             Not affected
Vulnerability L1tf:                      Not affected
Vulnerability Mds:                       Not affected
Vulnerability Meltdown:                  Not affected
Vulnerability Mmio stale data:           Not affected
Vulnerability Old microcode:             Not affected
Vulnerability Reg file data sampling:    Not affected
Vulnerability Retbleed:                  Mitigation; untrained return thunk; SMT enabled with STIBP protection
Vulnerability Spec rstack overflow:      Mitigation; Safe RET
Vulnerability Spec store bypass:         Mitigation; Speculative Store Bypass disabled via prctl
Vulnerability Spectre v1:                Mitigation; usercopy/swapgs barriers and __user pointer sanitization
Vulnerability Spectre v2:                Mitigation; Retpolines; IBPB conditional; STIBP always-on; RSB filling; PBRSB-eIBRS Not affected; BHI Not affected
Vulnerability Srbds:                     Not affected
Vulnerability Tsa:                       Not affected
Vulnerability Tsx async abort:           Not affected
Vulnerability Vmscape:                   Mitigation; IBPB before exit to userspace

==============================
Versions of relevant libraries
==============================
[pip3] flashinfer-python==0.6.7
[pip3] numpy==2.2.6
[pip3] nvidia-cublas==13.1.0.3
[pip3] nvidia-cublas-cu12==12.8.4.1
[pip3] nvidia-cuda-cupti==13.0.85
[pip3] nvidia-cuda-cupti-cu12==12.8.90
[pip3] nvidia-cuda-nvrtc==13.0.88
[pip3] nvidia-cuda-nvrtc-cu12==12.8.93
[pip3] nvidia-cuda-runtime==13.0.96
[pip3] nvidia-cuda-runtime-cu12==12.8.90
[pip3] nvidia-cudnn-cu12==9.10.2.21
[pip3] nvidia-cudnn-cu13==9.19.0.56
[pip3] nvidia-cudnn-frontend==1.18.0
[pip3] nvidia-cufft==12.0.0.61
[pip3] nvidia-cufft-cu12==11.3.3.83
[pip3] nvidia-cufile==1.15.1.6
[pip3] nvidia-cufile-cu12==1.13.1.3
[pip3] nvidia-curand==10.4.0.35
[pip3] nvidia-curand-cu12==10.3.9.90
[pip3] nvidia-cusolver==12.0.4.66
[pip3] nvidia-cusolver-cu12==11.7.3.90
[pip3] nvidia-cusparse==12.6.3.3
[pip3] nvidia-cusparse-cu12==12.5.8.93
[pip3] nvidia-cusparselt-cu12==0.7.1
[pip3] nvidia-cusparselt-cu13==0.8.0
[pip3] nvidia-cutlass-dsl==4.4.2
[pip3] nvidia-cutlass-dsl-libs-base==4.4.2
[pip3] nvidia-ml-py==13.595.45
[pip3] nvidia-nccl-cu12==2.27.5
[pip3] nvidia-nccl-cu13==2.28.9
[pip3] nvidia-nvjitlink==13.0.88
[pip3] nvidia-nvjitlink-cu12==12.8.93
[pip3] nvidia-nvshmem-cu12==3.4.5
[pip3] nvidia-nvshmem-cu13==3.4.5
[pip3] nvidia-nvtx==13.0.85
[pip3] nvidia-nvtx-cu12==12.8.90
[pip3] pyzmq==27.1.0
[pip3] torch==2.11.0
[pip3] torch_c_dlpack_ext==0.1.5
[pip3] torchaudio==2.11.0
[pip3] torchvision==0.26.0
[pip3] transformers==4.57.6
[pip3] triton==3.6.0
[conda] Could not collect

==============================
         vLLM Info
==============================
ROCM Version                 : Could not collect
vLLM Version                 : 0.19.1rc1.dev269+gf7e62e3d6 (git sha: f7e62e3d6)
vLLM Build Flags:
  CUDA Archs: Not Set; ROCm: Disabled; XPU: Disabled
GPU Topology:
        GPU0    GPU1    GPU2    GPU3    GPU4    GPU5    GPU6    GPU7    NIC0    NIC1    NIC2    NIC3    CPU Affinity    NUMA Affinity   GPU NUMA ID
GPU0     X      NV12    NV12    NV12    NV12    NV12    NV12    NV12    SYS     SYS     SYS     SYS     48-63,176-191   3               N/A
GPU1    NV12     X      NV12    NV12    NV12    NV12    NV12    NV12    SYS     SYS     SYS     SYS     48-63,176-191   3               N/A
GPU2    NV12    NV12     X      NV12    NV12    NV12    NV12    NV12    SYS     SYS     SYS     SYS     16-31,144-159   1               N/A
GPU3    NV12    NV12    NV12     X      NV12    NV12    NV12    NV12    SYS     SYS     SYS     SYS     16-31,144-159   1               N/A
GPU4    NV12    NV12    NV12    NV12     X      NV12    NV12    NV12    SYS     SYS     SYS     SYS     112-127,240-255 7               N/A
GPU5    NV12    NV12    NV12    NV12    NV12     X      NV12    NV12    SYS     SYS     SYS     SYS     112-127,240-255 7               N/A
GPU6    NV12    NV12    NV12    NV12    NV12    NV12     X      NV12    SYS     SYS     SYS     SYS     80-95,208-223   5               N/A
GPU7    NV12    NV12    NV12    NV12    NV12    NV12    NV12     X      SYS     SYS     SYS     SYS     80-95,208-223   5               N/A
NIC0    SYS     SYS     SYS     SYS     SYS     SYS     SYS     SYS      X      PIX     SYS     SYS
NIC1    SYS     SYS     SYS     SYS     SYS     SYS     SYS     SYS     PIX      X      SYS     SYS
NIC2    SYS     SYS     SYS     SYS     SYS     SYS     SYS     SYS     SYS     SYS      X      PIX
NIC3    SYS     SYS     SYS     SYS     SYS     SYS     SYS     SYS     SYS     SYS     PIX      X 

Legend:

  X    = Self
  SYS  = Connection traversing PCIe as well as the SMP interconnect between NUMA nodes (e.g., QPI/UPI)
  NODE = Connection traversing PCIe as well as the interconnect between PCIe Host Bridges within a NUMA node
  PHB  = Connection traversing PCIe as well as a PCIe Host Bridge (typically the CPU)
  PXB  = Connection traversing multiple PCIe bridges (without traversing the PCIe Host Bridge)
  PIX  = Connection traversing at most a single PCIe bridge
  NV#  = Connection traversing a bonded set of # NVLinks

NIC Legend:

  NIC0: mlx5_4
  NIC1: mlx5_5
  NIC2: mlx5_10
  NIC3: mlx5_11

==============================
     Environment Variables
==============================
PYTORCH_NVML_BASED_CUDA_CHECK=1
TORCHINDUCTOR_COMPILE_THREADS=1
TORCHINDUCTOR_CACHE_DIR=/tmp/torchinductor_local
</details>

🐛 Describe the bug

Bug Description

When serving a model with Mixture-of-Experts (MoE) and a LoRA adapter that targets expert layers, vLLM crashes with cudaErrorIllegalAddress during PIECEWISE CUDA graph replay. The crash occurs when base model and LoRA requests are in the same batch.

Affected versions: v0.18.0, v0.19.0, nightly-55e1a8e1035bddb0b5b63f9ddecc8b4e16fc3ef6 (likely all versions with PIECEWISE CUDA graph support + MoE LoRA)

Affected models: Any MoE model with expert-targeting LoRA adapters. Confirmed on:

  • NemotronH with MoE expert LoRA: - nvidia/NVIDIA-Nemotron-3-Super-120B-A12B - nvidia/NVIDIA-Nemotron-3-Nano-30B-A3B
  • Mixtral with MoE expert LoRA.

Affected Precision models: BF16, FP8

Root Cause

PunicaWrapperGPU.moe_lora_align_block_size() (vllm/lora/punica_wrapper/punica_gpu.py) allocates three temporary output buffers with torch.empty() on every invocation:

sorted_ids = torch.empty((max_loras * max_num_tokens_padded,), dtype=torch.int32, device=topk_ids.device)
expert_ids = torch.empty((max_loras * max_num_m_blocks,), dtype=torch.int32, device=topk_ids.device)
num_tokens_post_pad = torch.empty((max_loras,), dtype=torch.int32, device=topk_ids.device)

The underlying C++ op torch.ops._moe_C.moe_lora_align_block_size has no register_fake implementation, so torch.compile cannot trace through it. During PIECEWISE CUDA graph capture, this op runs in eager mode within a graph segment. The torch.empty() allocations are recorded as graph memory nodes with specific GPU addresses baked into the captured graph.

On replay, the eager moe_lora_align_block_size runs again and torch.empty() returns different GPU addresses (the caching allocator is in a different state due to different batch composition). However, the captured graph segment still references the old addresses from capture time. Downstream LoRA kernels read from freed/stale memory, causing cudaErrorIllegalAddress.

Why it only crashes with mixed base+LoRA batches

vLLM captures separate CUDA graphs for has_lora=False and has_lora=True batches (cudagraph_specialize_lora=True by default). The crash requires all three conditions:

  1. has_lora=True graph is selected (LoRA requests present)
  2. no_lora_flag_cpu=False (not all tokens are base-model-only, so LoRA kernels actually execute instead of early-exiting)
  3. Batch composition differs from warmup (the torch.empty() allocator returns different addresses)
  • Base-only batch: selects has_lora=False graph, LoRA kernels early-exit → stale addresses never dereferenced
  • LoRA-only batch: selects has_lora=True graph, allocation pattern tends to match warmup → usually safe
  • Mixed batch: selects has_lora=True graph, LoRA kernels run, but allocator state differs from warmup → CRASH

Crash trace (with CUDA_LAUNCH_BLOCKING=1)

File "vllm/compilation/cuda_graph.py", line 355, in __call__
    entry.cudagraph.replay()
File "torch/cuda/graphs.py", line 143, in replay
    super().replay()
torch.AcceleratorError: CUDA error: an illegal memory access was encountered

Reproduce script:

#!/usr/bin/env python3
"""
Offline reproducer for the concurrent base + LoRA MoE segfault.

Uses vLLM's LLM API directly — no server needed. Sends interleaved
base + LoRA requests in a single batch to trigger the
moe_lora_align_block_size stale-buffer crash during CUDA graph replay.

Usage:
    python repro_offline.py
    python repro_offline.py --model nvidia/NVIDIA-Nemotron-3-Nano-30B-A3B-BF16
    python repro_offline.py --model nvidia/NVIDIA-Nemotron-3-Nano-30B-A3B-BF16 --adapter ace-nguyen/NVIDIA-Nemotron-3-Nano-30B-A3B-BF16-dummy-moe-lora --tp 2
    python repro_offline.py --cudagraph-mode full
    python repro_offline.py --cudagraph-mode none   # eager mode, no graphs
"""

import argparse

from vllm import LLM, SamplingParams
from vllm.lora.request import LoRARequest

# Valid CUDAGraphMode values (from pydantic validation):
#   0 = NONE, 1 = PIECEWISE, 2 = FULL, (2,0) = FULL, (2,1) = FULL+PIECEWISE
CUDAGRAPH_MODES = {
    "full": 2,                # full only, no piecewise
    "piecewise": 1,           # piecewise only, no full
    "both": (2, 1),           # full + piecewise (vLLM default)
    "none": None,             # eager mode, no graphs at all
}


def main():
    p = argparse.ArgumentParser(description="Offline base+LoRA crash reproducer")
    p.add_argument(
        "--model",
        default="nvidia/NVIDIA-Nemotron-3-Nano-30B-A3B-BF16",
        help="Base model path",
    )
    p.add_argument(
        "--adapter",
        default="ace-nguyen/NVIDIA-Nemotron-3-Nano-30B-A3B-BF16-dummy-moe-lora",
        help="LoRA adapter path",
    )
    p.add_argument("--adapter-name", default="test-lora", help="LoRA adapter name")
    p.add_argument("--tp", type=int, default=1, help="Tensor parallel size")
    p.add_argument(
        "--cudagraph-mode",
        choices=list(CUDAGRAPH_MODES.keys()),
        default=None,
        help="CUDA graph mode: full, piecewise, full_and_piecewise, none (default: vLLM default)",
    )
    p.add_argument("-n", type=int, default=10, help="Number of request pairs (base+lora)")
    args = p.parse_args()

    print(f"Model:          {args.model}")
    print(f"Adapter:        {args.adapter}")
    print(f"TP:             {args.tp}")
    print(f"CUDAGraph mode: {args.cudagraph_mode or 'default'}")
    print(f"Pairs:          {args.n}")
    print()

    llm_kwargs = dict(
        model=args.model,
        tensor_parallel_size=args.tp,
        enable_lora=True,
        trust_remote_code=True,
    )

    if args.cudagraph_mode is not None:
        mode = CUDAGRAPH_MODES[args.cudagraph_mode]
        if mode is None:
            llm_kwargs["enforce_eager"] = True
        else:
            llm_kwargs["compilation_config"] = {"cudagraph_mode": mode}

    llm = LLM(**llm_kwargs)

    sampling = SamplingParams(
        max_tokens=32,
        min_tokens=32,
        ignore_eos=True,
    )

    lora_req = LoRARequest(args.adapter_name, 1, args.adapter)

    # Build interleaved batch: base, lora, base, lora, ...
    prompts = []
    lora_requests = []
    for i in range(args.n):
        # Base model request
        prompts.append(f"Base request {i}: Count from 1 to 50:")
        lora_requests.append(None)
        # LoRA request
        prompts.append(f"LoRA request {i}: Count from 1 to 50:")
        lora_requests.append(lora_req)

    print(f"Generating {len(prompts)} requests (interleaved base+LoRA)...")

    # This triggers the crash if the bug is present — the first generate()
    # replays CUDA graphs captured during warmup, and stale buffer addresses
    # in moe_lora_align_block_size cause a segfault.
    outputs = llm.generate(
        prompts,
        sampling_params=sampling,
        lora_request=lora_requests,
    )

    print(f"\nCompleted {len(outputs)} requests successfully.")
    for i, out in enumerate(outputs[:4]):
        tag = "BASE" if lora_requests[i] is None else "LORA"
        text = out.outputs[0].text[:80].replace("\n", " ")
        print(f"  [{tag}] {text}...")

    print("\nPASSED")

if __name__ == "__main__":
    main()

Error logs:

server_crash.log

Logs after export CUDA_LAUNCH_BLOCKING=1:

server_crash-CUDA_LAUNCH_BLOCKING.log

Before submitting a new issue...

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extent analysis

TL;DR

The most likely fix is to implement a register_fake method for the moe_lora_align_block_size op to allow torch.compile to trace through it and avoid stale buffer addresses.

Guidance

  1. Implement register_fake for moe_lora_align_block_size: This will enable torch.compile to trace through the op and avoid capturing stale buffer addresses.
  2. Verify the fix: Run the provided reproducer script with the modified moe_lora_align_block_size op to ensure the crash is resolved.
  3. Test with different batch compositions: Test the fix with various batch compositions, including mixed base and LoRA requests, to ensure the issue is fully resolved.
  4. Review CUDA graph capture and replay: Verify that the CUDA graph capture and replay process is working correctly with the modified op.

Example

# Example implementation of register_fake for moe_lora_align_block_size
def register_fake(op):
    # Implement the logic to register the fake op
    pass

Note: The actual implementation of register_fake will depend on the specifics of the moe_lora_align_block_size op and the requirements of torch.compile.

Notes

  • The fix assumes that the moe_lora_align_block_size op is the root cause of the issue. If the issue persists after implementing the fix, further investigation may be necessary.
  • The reproducer script provided can be used to test the fix and ensure that the crash is resolved.

Recommendation

Apply the workaround by implementing the register_fake method for the moe_lora_align_block_size op. This will allow torch.compile to trace through the op and avoid capturing stale buffer addresses, resolving the crash issue.

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