vllm - 💡(How to fix) Fix [Bug]:[Qwen3.5] V1 KV cache page size unification fails for Qwen3.5/Qwen3.6 hybrid GPTQ Marlin model [1 comments, 2 participants]

vllm2026-04-28 16:33:57

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vllm-project/vllm#41153•Fetched 2026-04-29 06:12:02

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shanyulu

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j9smith

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Error Message

NotImplementedError: The page size of the layer is not divisible by the maximum page size. Cannot unify by adjusting block_size.

Code Example

Your output of `python collect_env.py` here

---

NotImplementedError: The page size of the layer is not divisible by the maximum page size. Cannot unify by adjusting block_size.

---

vllm/v1/core/kv_cache_utils.py
unify_kv_cache_spec_page_size()

RAW_BUFFERClick to expand / collapse

Your current environment

<details> <summary>The output of <code>python collect_env.py</code></summary> Collecting environment information... ============================== System Info ============================== OS : Ubuntu 22.04.5 LTS (x86_64) GCC version : (Ubuntu 11.4.0-1ubuntu1~22.04.3) 11.4.0 Clang version : Could not collect CMake version : version 3.22.1 Libc version : glibc-2.35

============================== PyTorch Info

PyTorch version : 2.10.0+cu128 Is debug build : False CUDA used to build PyTorch : 12.8 ROCM used to build PyTorch : N/A XPU used to build PyTorch : N/A

============================== Python Environment

Python version : 3.11.15 (main, Mar 11 2026, 17:20:07) [GCC 14.3.0] (64-bit runtime) Python platform : Linux-5.15.0-43-generic-x86_64-with-glibc2.35

============================== CUDA / GPU Info

Is CUDA available : True CUDA runtime version : 12.4.131 CUDA_MODULE_LOADING set to : GPU models and configuration : GPU 0: NVIDIA GeForce RTX 4090 GPU 1: NVIDIA GeForce RTX 4090 GPU 2: NVIDIA GeForce RTX 4090 GPU 3: NVIDIA GeForce RTX 4090

Nvidia driver version : 580.126.09 cuDNN version : Probably one of the following: /usr/lib/x86_64-linux-gnu/libcudnn.so.9.1.1 /usr/lib/x86_64-linux-gnu/libcudnn_adv.so.9.1.1 /usr/lib/x86_64-linux-gnu/libcudnn_cnn.so.9.1.1 /usr/lib/x86_64-linux-gnu/libcudnn_engines_precompiled.so.9.1.1 /usr/lib/x86_64-linux-gnu/libcudnn_engines_runtime_compiled.so.9.1.1 /usr/lib/x86_64-linux-gnu/libcudnn_graph.so.9.1.1 /usr/lib/x86_64-linux-gnu/libcudnn_heuristic.so.9.1.1 /usr/lib/x86_64-linux-gnu/libcudnn_ops.so.9.1.1 HIP runtime version : N/A MIOpen runtime version : N/A Is XNNPACK available : True

============================== CPU Info

Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Address sizes: 52 bits physical, 57 bits virtual Byte Order: Little Endian CPU(s): 64 On-line CPU(s) list: 0-63 Vendor ID: AuthenticAMD Model name: AMD EPYC 9224 24-Core Processor CPU family: 25 Model: 17 Thread(s) per core: 1 Core(s) per socket: 32 Socket(s): 2 Stepping: 1 BogoMIPS: 4992.50 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm rep_good nopl cpuid extd_apicid tsc_known_freq pni pclmulqdq ssse3 fma cx16 pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand hypervisor lahf_lm cmp_legacy cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw perfctr_core invpcid_single ssbd ibrs ibpb stibp vmmcall fsgsbase tsc_adjust bmi1 avx2 smep bmi2 erms invpcid avx512f avx512dq rdseed adx smap avx512ifma clflushopt clwb avx512cd sha_ni avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves clzero xsaveerptr wbnoinvd virt_ssbd arat avx512vbmi umip pku ospke avx512_vbmi2 gfni vaes vpclmulqdq avx512_vnni avx512_bitalg avx512_vpopcntdq la57 rdpid fsrm arch_capabilities Hypervisor vendor: KVM Virtualization type: full L1d cache: 4 MiB (64 instances) L1i cache: 4 MiB (64 instances) L2 cache: 32 MiB (64 instances) L3 cache: 1 GiB (64 instances) NUMA node(s): 1 NUMA node0 CPU(s): 0-63 Vulnerability Itlb multihit: Not affected Vulnerability L1tf: Not affected Vulnerability Mds: Not affected Vulnerability Meltdown: Not affected Vulnerability Mmio stale data: Not affected Vulnerability Spec store bypass: Vulnerable Vulnerability Spectre v1: Vulnerable: __user pointer sanitization and usercopy barriers only; no swapgs barriers Vulnerability Spectre v2: Vulnerable, IBPB: disabled, STIBP: disabled Vulnerability Srbds: Not affected Vulnerability Tsx async abort: Not affected

============================== Versions of relevant libraries

[pip3] flashinfer-python==0.6.6 [pip3] numpy==2.2.6 [pip3] nvidia-cublas-cu12==12.8.4.1 [pip3] nvidia-cuda-cupti-cu12==12.8.90 [pip3] nvidia-cuda-nvrtc-cu12==12.8.93 [pip3] nvidia-cuda-runtime-cu12==12.8.90 [pip3] nvidia-cudnn-cu12==9.10.2.21 [pip3] nvidia-cudnn-frontend==1.18.0 [pip3] nvidia-cufft-cu12==11.3.3.83 [pip3] nvidia-cufile-cu12==1.13.1.3 [pip3] nvidia-curand-cu12==10.3.9.90 [pip3] nvidia-cusolver-cu12==11.7.3.90 [pip3] nvidia-cusparse-cu12==12.5.8.93 [pip3] nvidia-cusparselt-cu12==0.7.1 [pip3] nvidia-cutlass-dsl==4.5.0.dev0 [pip3] nvidia-cutlass-dsl-libs-base==4.5.0.dev0 [pip3] nvidia-ml-py==13.595.45 [pip3] nvidia-nccl-cu12==2.27.5 [pip3] nvidia-nvjitlink-cu12==12.8.93 [pip3] nvidia-nvshmem-cu12==3.4.5 [pip3] nvidia-nvtx-cu12==12.8.90 [pip3] pyzmq==27.1.0 [pip3] torch==2.10.0 [pip3] torch_c_dlpack_ext==0.1.5 [pip3] torchaudio==2.10.0 [pip3] torchvision==0.25.0 [pip3] transformers==5.6.2 [pip3] triton==3.6.0 [conda] flashinfer-python 0.6.6 pypi_0 pypi [conda] numpy 2.2.6 pypi_0 pypi [conda] nvidia-cublas-cu12 12.8.4.1 pypi_0 pypi [conda] nvidia-cuda-cupti-cu12 12.8.90 pypi_0 pypi [conda] nvidia-cuda-nvrtc-cu12 12.8.93 pypi_0 pypi [conda] nvidia-cuda-runtime-cu12 12.8.90 pypi_0 pypi [conda] nvidia-cudnn-cu12 9.10.2.21 pypi_0 pypi [conda] nvidia-cudnn-frontend 1.18.0 pypi_0 pypi [conda] nvidia-cufft-cu12 11.3.3.83 pypi_0 pypi [conda] nvidia-cufile-cu12 1.13.1.3 pypi_0 pypi [conda] nvidia-curand-cu12 10.3.9.90 pypi_0 pypi [conda] nvidia-cusolver-cu12 11.7.3.90 pypi_0 pypi [conda] nvidia-cusparse-cu12 12.5.8.93 pypi_0 pypi [conda] nvidia-cusparselt-cu12 0.7.1 pypi_0 pypi [conda] nvidia-cutlass-dsl 4.5.0.dev0 pypi_0 pypi [conda] nvidia-cutlass-dsl-libs-base 4.5.0.dev0 pypi_0 pypi [conda] nvidia-ml-py 13.595.45 pypi_0 pypi [conda] nvidia-nccl-cu12 2.27.5 pypi_0 pypi [conda] nvidia-nvjitlink-cu12 12.8.93 pypi_0 pypi [conda] nvidia-nvshmem-cu12 3.4.5 pypi_0 pypi [conda] nvidia-nvtx-cu12 12.8.90 pypi_0 pypi [conda] pyzmq 27.1.0 pypi_0 pypi [conda] torch 2.10.0 pypi_0 pypi [conda] torch-c-dlpack-ext 0.1.5 pypi_0 pypi [conda] torchaudio 2.10.0 pypi_0 pypi [conda] torchvision 0.25.0 pypi_0 pypi [conda] transformers 5.6.2 pypi_0 pypi [conda] triton 3.6.0 pypi_0 pypi

============================== vLLM Info

ROCM Version : Could not collect vLLM Version : 0.18.1 vLLM Build Flags: CUDA Archs: Not Set; ROCm: Disabled; XPU: Disabled GPU Topology: GPU0 GPU1 GPU2 GPU3 CPU Affinity NUMA Affinity GPU NUMA ID GPU0 X PHB PHB PHB 0-63 0 N/A GPU1 PHB X PHB PHB 0-63 0 N/A GPU2 PHB PHB X PHB 0-63 0 N/A GPU3 PHB PHB PHB X 0-63 0 N/A

Legend:

X = Self SYS = Connection traversing PCIe as well as the SMP interconnect between NUMA nodes (e.g., QPI/UPI) NODE = Connection traversing PCIe as well as the interconnect between PCIe Host Bridges within a NUMA node PHB = Connection traversing PCIe as well as a PCIe Host Bridge (typically the CPU) PXB = Connection traversing multiple PCIe bridges (without traversing the PCIe Host Bridge) PIX = Connection traversing at most a single PCIe bridge NV# = Connection traversing a bonded set of # NVLinks

============================== Environment Variables

CUDA_DEVICE_ORDER=PCI_BUS_ID PYTORCH_CUDA_ALLOC_CONF=expandable_segments:True,max_split_size_mb:32,garbage_collection_threshold:0.5 LD_LIBRARY_PATH=/lib:/lib:/usr/local/cuda/lib64: CUDA_HOME=/usr/local/cuda CUDA_HOME=/usr/local/cuda PYTORCH_NVML_BASED_CUDA_CHECK=1 TORCHINDUCTOR_COMPILE_THREADS=1 TORCHINDUCTOR_CACHE_DIR=/tmp/torchinductor_ubuntu

Collecting environment information...

    System Info

============================== OS : Ubuntu 22.04.5 LTS (x86_64) GCC version : (Ubuntu 11.4.0-1ubuntu1~22.04.3) 11.4.0 Clang version : Could not collect CMake version : version 3.22.1 Libc version : glibc-2.35

============================== PyTorch Info

PyTorch version : 2.10.0+cu128 Is debug build : False CUDA used to build PyTorch : 12.8 ROCM used to build PyTorch : N/A XPU used to build PyTorch : N/A

============================== Python Environment

Python version : 3.11.15 (main, Mar 11 2026, 17:20:07) [GCC 14.3.0] (64-bit runtime) Python platform : Linux-5.15.0-43-generic-x86_64-with-glibc2.35

============================== CUDA / GPU Info

============================== CPU Info

============================== Versions of relevant libraries

============================== vLLM Info

Legend:

============================== Environment Variables

(vllm_qwen35_0181) ubuntu@10-60-31-217:~/yulu/qwen36_gptq$

Your output of `python collect_env.py` here

</details>

🐛 Describe the bug

I am trying to serve a GPTQModel-quantized Qwen3.6-27B model with vLLM. The model uses the Qwen3_5 hybrid architecture with both linear_attention and full_attention layers.

GPTQModel quantization succeeds. vLLM can resolve the model as Qwen3_5ForCausalLM, enable gptq_marlin, use MarlinLinearKernel, and enter the Triton/FLA GatedDeltaNet path.

However, both vLLM 0.18.1 and 0.19.x fail during V1 KV cache initialization with:

NotImplementedError: The page size of the layer is not divisible by the maximum page size. Cannot unify by adjusting block_size.

The failure happens in:

vllm/v1/core/kv_cache_utils.py
unify_kv_cache_spec_page_size()

This looks like a V1 KV cache page-size grouping issue for Qwen3.5/Qwen3.6 hybrid models, where linear_attention and full_attention layers have incompatible page sizes.

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extent analysis

TL;DR

The most likely fix is to modify the unify_kv_cache_spec_page_size() function in vllm/v1/core/kv_cache_utils.py to handle incompatible page sizes for hybrid models like Qwen3.5/Qwen3.6.

Guidance

Investigate the unify_kv_cache_spec_page_size() function to understand how it handles page size grouping for different layer types.
Consider adding a special case for hybrid models like Qwen3.5/Qwen3.6 to handle incompatible page sizes between linear_attention and full_attention layers.
Verify that the modified function correctly handles page size grouping for both linear_attention and full_attention layers in the Qwen3.5/Qwen3.6 model.
Test the modified function with the Qwen3.6-27B model to ensure it resolves the NotImplementedError issue.

Example

No code example is provided as the modification requires a deep understanding of the unify_kv_cache_spec_page_size() function and the V1 KV cache initialization process.

Notes

The provided information suggests a specific issue with the V1 KV cache page-size grouping for hybrid models. However, without more context or details about the unify_kv_cache_spec_page_size() function, it's challenging to provide a precise solution.

Recommendation

Apply a workaround by modifying the unify_kv_cache_spec_page_size() function to handle incompatible page sizes for hybrid models like Qwen3.5/Qwen3.6, as this seems to be the root cause of the issue.

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#api #embedding generation #cache error #pipeline error #environment variable

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vllm - 💡(How to fix) Fix [Bug]:[Qwen3.5] V1 KV cache page size unification fails for Qwen3.5/Qwen3.6 hybrid GPTQ Marlin model [1 comments, 2 participants]

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Error Message

Code Example

Your current environment

============================== PyTorch Info

============================== Python Environment

============================== CUDA / GPU Info

============================== CPU Info

============================== Versions of relevant libraries

============================== vLLM Info

============================== Environment Variables

Collecting environment information...

============================== PyTorch Info

============================== Python Environment

============================== CUDA / GPU Info

============================== CPU Info

============================== Versions of relevant libraries

============================== vLLM Info

============================== Environment Variables

🐛 Describe the bug

Before submitting a new issue...

extent analysis

TL;DR

Guidance

Example

Notes

Recommendation

Still need to ship something?

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