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pytorch - ✅(Solved) Fix DISABLED test_aot_export_inline_asm_elementwise_simple_cuda_float32 (__main__.TestHOPCUDA) [2 pull requests, 1 comments, 2 participants]

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pytorch/pytorch#180010•Fetched 2026-04-11 06:10:16
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Author
praguptapragupta
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praguptapraguptapytorch-bot[bot]pytorch-bot[bot]
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Root Cause

This test was disabled because it is failing on main branch (recent examples).

PR fix notes

PR #180257: [ROCm] Fix inline_asm_elementwise for ROCm

Description (problem / solution / changelog)

Fixes #179925. Fixes #179927. Fixes #180010. Fixes #179965. Fixes #179982. Fixes #179946.

The inline_asm_elementwise HOP had all assembly hardcoded as PTX and the test file was blocklisted on ROCm. This PR adds AMDGCN equivalents behind torch.version.hip guards so every test case works on both backends. The NVIDIA path is untouched throughout.

Most PTX-to-AMDGCN translations are direct (mov.f32 to v_mov_b32, f/r constraints to v). The fp16/bf16 native cases required a different approach. AMDGCN has no h constraint for 16-bit registers, so we add in f32 and convert down via v_cvt_f16_f32 and v_cvt_pk_bf16_f32.

Two Inductor codegen fixes handle AMDGCN's newline-separated instructions (PTX uses semicolons on one line). In utils.py, multiline format_node() output is split so each line gets the comment prefix. In triton.py, asm literals are double-escaped via repr() to survive two layers of Python string parsing. Both are HIP-guarded.

cc @jeffdaily @sunway513 @jithunnair-amd @pruthvistony @ROCmSupport @jataylo @hongxiayang @naromero77amd @pragupta @jerrymannil @xinyazhang @voznesenskym @penguinwu @EikanWang @jgong5 @Guobing-Chen @XiaobingSuper @zhuhaozhe @blzheng @wenzhe-nrv @jiayisunx @ipiszy @kadeng @muchulee8 @amjames @chauhang @aakhundov @coconutruben

Changed files

  • test/higher_order_ops/test_inline_asm_elementwise.py (modified, +214/-66)
  • test/run_test.py (modified, +0/-1)
  • torch/_inductor/codegen/triton.py (modified, +16/-1)
  • torch/_inductor/utils.py (modified, +11/-3)
  • torch/testing/_internal/hop_db.py (modified, +8/-0)

PR #180600: [ROCm] Fix inline_asm_elementwise for ROCm

Description (problem / solution / changelog)

Fixes #179925. Fixes #179927. Fixes #180010. Fixes #179965. Fixes #179982. Fixes #179946.

The inline_asm_elementwise HOP had all assembly hardcoded as PTX and the test file was blocklisted on ROCm. This PR adds AMDGCN equivalents behind torch.version.hip guards so every test case works on both backends. The NVIDIA path is untouched throughout.

Most PTX-to-AMDGCN translations are direct (mov.f32 to v_mov_b32, f/r constraints to v). The fp16/bf16 native cases required a different approach. AMDGCN has no h constraint for 16-bit registers, so we add in f32 and convert down via v_cvt_f16_f32 and v_cvt_pk_bf16_f32.

Two Inductor codegen fixes handle AMDGCN's newline-separated instructions (PTX uses semicolons on one line). In utils.py, multiline format_node() output is split so each line gets the comment prefix. In triton.py, asm literals are double-escaped via repr() to survive two layers of Python string parsing. Both are HIP-guarded.

cc @jeffdaily @sunway513 @jithunnair-amd @pruthvistony @ROCmSupport @jataylo @hongxiayang @naromero77amd @pragupta @jerrymannil @xinyazhang @voznesenskym @penguinwu @EikanWang @jgong5 @Guobing-Chen @XiaobingSuper @zhuhaozhe @blzheng @wenzhe-nrv @jiayisunx @ipiszy @kadeng @muchulee8 @amjames @chauhang @aakhundov @coconutruben

Changed files

  • test/higher_order_ops/test_inline_asm_elementwise.py (modified, +214/-66)
  • test/run_test.py (modified, +0/-1)
  • torch/_inductor/codegen/triton.py (modified, +16/-1)
  • torch/_inductor/utils.py (modified, +11/-3)
  • torch/testing/_internal/hop_db.py (modified, +8/-0)
RAW_BUFFERClick to expand / collapse

Platforms: rocm

This test was disabled because it is failing on main branch (recent examples).

cc @jeffdaily @sunway513 @jithunnair-amd @pruthvistony @ROCmSupport @jataylo @hongxiayang @naromero77amd @jerrymannil @xinyazhang @chauhang @penguinwu @avikchaudhuri @zhxchen17 @tugsbayasgalan @angelayi @ydwu4

extent analysis

TL;DR

The test test_aot_export_inline_asm_elementwise_simple_cuda_float32 in test_hop.py needs to be investigated and fixed to resolve the failure on the main branch.

Guidance

  • Investigate the recent failures on torch-ci.com to understand the error messages and stack traces.
  • Review the test case test_aot_export_inline_asm_elementwise_simple_cuda_float32 in test_hop.py to identify potential issues with the test or the code being tested.
  • Check the differences between the main branch and other branches where the test may be passing to identify potential regressions.
  • Consider re-enabling the test and running it locally to reproduce the issue and gather more information.

Notes

The issue lacks specific technical details, so a more detailed analysis of the test and the code is required to determine the root cause of the failure.

Recommendation

Apply workaround: Re-enable the test and run it locally to gather more information about the failure, then debug and fix the issue.

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